elec@st

Definitions :

LIT : (Lock In Thermography) Equipment used to locate a default (hot spot technique) in a chip. LIT is a standard technique in nondestructive testing that generate amplitude and phase images of the chip.
FIB : Focused Ion Beam
FA : Failure Analysis
S&V (S&V 3D) : Slice & View (Slice & View 3D)
TEM : Transmission Electron Microscopy

Serma header


	*SERMA Main Strength* FA chalenge for product and technologe evolution Electrical verification equipments Test flow adapted to each situation Further analysis proposition (FIB, S&V 3D, TEM ...) Work on site possibility (Open Laboratory) Data and sample security (pgp, safety box…).

*Electrical characterisation ?* Confirm electrical failure Define the failing mode Simplify the setup to address the failure Exemple of electrical characterization setup and IV curve result =>

*Accessing the* chip ? Mechanic opening techniques Laser opening techniques Chemistry opening techniques Goal: keep the chip physical and electric integrity

*Failure Localization* ? EMMI : leackage failures Liquid cristals : leackage, resistive failures LIT : leackage or short-circuit (resistive) failures

Additional techniques : Failure Observation

*Usage of FIB V600 ?*	*Usage of Slice & View ?* 622 slices, 5mm step, (x,y,z)	Usage of TEM ?